By Eelco Bergman, Chief Business Officer, Saras Micro Devices
Throughout 2025, the limits of traditional power-delivery architectures for high-performance computing devices became too significant to ignore. Artificial intelligence (AI) accelerators pushed into kilowatt-class devices, advanced packaging raised silicon and power densities, and board-centric architectures struggled to keep pace with long-term AI compute performance growth. From technology development to manufacturing readiness, this shift validated our mission to enable a new generation of power-delivery architectures for high-performance computing devices, sharpening our industry priorities and clarifying requirements for 2026.
2025: From Concept to Customer Silicon
Over the course of the year, the relentless pursuit of our mission has allowed us to reach milestones that marked a transition from demonstrating our technology in the lab to delivering it into customer programs. Specifically, a key step in that transition was the shipping of our first functional capacitor parts, engineered and designed to bolster AI accelerators and GPUs with demanding power profiles, to our lead customers for performance characterization and validation in their applications.
To support this shift, our operations team established its initial production line in Chandler, Arizona. This pilot line enables in-house control of materials, fabrication, testing, and quality assurance all under one roof. The implementation of this vertically integrated process shortens manufacturing cycles, accelerates yield learning, and positions Saras as a production-ready partner as customers transition from evaluation to ramp.
Recognition and Ecosystem Momentum
In 2025, we saw substantial industry and community support, with Saras and STILE™ receiving 3D InCites Awards in two categories. First, we received the Technology Enablement Award, recognizing the role our embedded passive solutions play in improving the efficiency of power-delivery networks for AI and advanced packaging. This was paired with our second >3D InCites Award for Best Place to Work, reinforcing the strength of our team and the culture we have established behind the technology.
Deepening our role in the U.S. advanced packaging ecosystem, we joined two CHIPS National Advanced Packaging Manufacturing Program (NAPMP) initiatives, SHIELD USA and SMART. Both programs focus on developing next-generation, power-efficient advanced packaging substrates in the United States. By contributing our STILE™ embedded passive technology to these programs, we’re helping ensure customers have access to domestically developed, high-efficiency PDN solutions that are easier to design in, qualify, and scale, strengthening both their performance roadmaps and their supply chain resilience.
Locally, here at our headquarters in Arizona, Saras was named one of Chandler’s top 100 companies by the City of Chandler and the Chandler Chamber of Commerce. This translated to a feature in InBusiness Phoenix, which recognized our advancements in power delivery at scale along with our role in strengthening the domestic semiconductor supply chain. Together, these recognitions highlight our technical progress and expanding regional impact.
AI Meets the Power Constraint
As the demand for AI infrastructure continues to grow exponentially, data center capacity is forecasted to reach hundreds of gigawatts by 2030. Capacity expansion is continually constrained by limitations on power availability and grid connections, as well as rising energy costs. At the device level, the adoption of advanced process nodes with lower operating voltages, chiplet-based architectures, 2.5D and 3D packaging, and heterogeneous integration are driving higher power densities and tighter voltage margins, challenging the effectiveness of traditional lateral power-delivery networks. The losses due to the high current and long power-distribution paths in these designs are becoming significant and can no longer be ignored.
By moving to vertical power-delivery architectures that leverage embedded actives and passives, our industry now sees a way forward. By shortening the power path and integrating high-density capacitors/inductors into the package substrate and system PCB, power-distribution efficiency is increased, transient response is improved, and routing constraints for critical memory interfaces are reduced, resulting in greater usable performance from every watt transported to a die.
What Changes in 2026
Looking ahead, we expect three trends to shape 2026 and beyond:
- High-power, heterogeneously integrated devices will become the norm rather than the exception, increasing the overall urgency to adopt new power-delivery architectures and fueling the need for a standard set of substrate/PCB embeddable passive components for the design toolkit in AI data center platforms.
- Performance per watt (PpW) will move to the forefront as a design objective. Rising energy costs, stricter regulations, and hard limits on grid capacity will increasingly shape system-design decisions—from architecture choices to where and how new data center capacity is deployed. To meet these constraints, customers will look for ways to extract more useful work from every watt, making high-efficiency power delivery a first-order requirement. Embedded passives and vertical power-delivery networks will be a key part of that solution, reducing distribution losses, improving transient response, and helping designers hit PpW targets without sacrificing performance.
- Ecosystem collaboration will be a deciding factor in the pace of adaptation to new power architectures. Success in our space depends on aligning device roadmaps, substrate and PCB capabilities, electronic design automation (EDA) tools, and manufacturing processes. Through our work in the CHIPS NAPMP projects and with our industry partners, we will make embedded power delivery a focus, enabling seamless design-in, simulation, and manufacturing at scale.
Executing on Our Mission
The AI wave will not be short-lived. The current build-out of AI capacity marks only the beginning of a major infrastructure investment for society at large. Our expectation is a long-term transformation of how we compute and process data. At the front of the wave, advanced nodes and heterogeneous integration will continue to expand what is possible at the chip and package level. Our role at Saras is to ensure that power delivery no longer inhibits this progress.
With a functioning pilot line in Arizona, first customer parts in the field, growing ecosystem partnerships, and external recognitions for both our innovations and our workplace, we close out 2025 and head into 2026 with an intense focus on our roadmap and solutions to real customer problems, with the adaptations of an ever-changing landscape.
Our team looks forward to working with customers and partners to deliver greater performance from every watt—not just propelling our industry forward but also defining a new class of power delivery that the new AI era demands.